Based on ARM ® architecture ® - M7 kernel STM32H7 series high-performance MCU

Using L1 cache, STM32H7 32-bit MCU realizes the highest theoretical performance of cortex-m7 kernel -- no matter from embedded flash memory or external memory to execute the code: the performance of 400 MHz processor frequency can reach 2010 CoreMark /856 DMIPS.

STM32H7 series 32-bit MCU adopts cortex-m7 kernel and has a new generation of intelligent architecture of peripheral set

• AXI bus and multi-ahb bus matrix for kernel, peripheral and memory interconnection

• 16 KB I cache and 16 KB D cache

• up to 2mb embedded dual flash memory with ECC and simultaneous read and write capability

• high speed primary direct memory access (MDMA) controller, two dual port DMA with FIFO and request router capabilities for optimized peripheral management, and one additional DMA

• chrom-art accelerator for efficient reproduction of 2D images. The dual precision FPU in the device is also part of the acceleration feature

• dual clock architecture makes peripheral speed independent of CPU speed, and system clock change does not affect peripheral work

, more peripherals, such as the four support SPDIF serial output audio interface (SAI), three full duplex I squared S interface, a four road input support SPDIF input interface, the two has a dedicated power supply USB OTG module and two-mode QSPI interface, two FD - CAN controller, a high precision timer, a TFT - LCD controller, a JPEG codec, two SDIO interface and many other analog peripherals, such as three fast 14 ADC, two comparator and two operational amplifiers.

• 1mb SRAM with decentralized structure: 192kb TCM RAM (including 64kb ITCM RAM and 128kb DTCM RAM for storing time-sensitive critical programs or data), 512kb, 288kb and 64kb user SRAM, and 4kb backup domain SRAM for storing data in a low-power mode.

security

Ability to authenticate and protect your software IP during initial mass production programming or during live firmware upgrades.

Energy efficient

• multi-power domain architecture allows different low-power modes to be set in different power domains to optimize power efficiency. In addition to the main voltage regulators that provide different voltages to the kernel during run or stop mode, the device also has a USB voltage regulator with built-in PHY power and a backup voltage regulator.

In run mode (peripherals closed), typical values for 278 (including power consumption/MHz @ VDD and 25 ° C = 3.3 V

• low power standby mode power consumption of 7 A

compatibility

• cortex-m7 downward compatible with the cortex-m4 instruction set

• STM32H7 series 32-bit microcontroller is fully compatible with the pins of STM32F7 series public package and most pins of STM32F4 series public package *

* note: see the data sheet for a special case of 100-foot encapsulation